The GR0000 Family of Processors


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This directory hosts the gr0000 ("zero thousand") family of streamlined FPGA-optimized RISC processors, and their system-on-a-chip infrastructure. Currently this includes the gr0040 and gr0041 CPUs and the soc system-on-a-chip framework.

This system is described in the latest revision of the paper Designing a Simple FPGA-Optimized RISC CPU and System-on-a-Chip, first presented at DesignCon 2001. Here are the accompanying slides.

The design is provided in

Note: this design is Copyright © 2000-2001, Gray Research LLC, and, as with XSOC, is licensed for limited non-commercial research and academic uses, as described in the LICENSE.

Here's the README:

  The soc/gr0040 Kit README
  Version 2001.03.09
  Copyright (C) 2001, Gray Research LLC.  All rights reserved.
  The contents of this file are subject to the XSOC License Agreement;
  you may not use this file except in compliance with this Agreement.
  See the LICENSE file.
  The soc/gr0040 Kit consists of these files.
  1. Documentation
      README: this file
      LICENSE: XSOC License Agreement
  	soc-gr0040-paper.pdf: DesignCon 2001 paper: "Designing a Simple
          FPGA-Optimized RISC CPU and System-on-a-Chip"
  	soc-gr0040-slides.pdf: Accompanying slides
  2. Verilog Design
      soc-gr0040.v: the gr0040 and gr0041 processors and system-on-a-chip
      soc-gr-tb.v: simple test bench
      ramb4.v: block RAM simulation model
  3. Demo
      fib.c: simple Fibonacci sequence
      fib.s: compiler output
      sim-gr0.s: simple startup code and interrupt handler
      end.s: simulator epilog
      fib.lst, fib.hex: assembler output
      ramh.mem, raml.mem: intialized block RAM memory images
      sim.out: Verilog testbench simulator output
  Note: As of version 2001.03.09, this design seems to run OK in simulation,
  but has not been verified in hardware. 
  Questions? Discuss the design on the FPGA CPU mailing list,
  Jan Gray,
  President, Gray Research LLC

Note the kit does not include the author's lcc-based compiler and the gr0040 assembler/simulator (and may never do so).

It also lacks the extensive documentation, specifications, instruction set test suites, etc. of the XSOC/xr16 Project Kit.

Copyright © 2000-2002, Gray Research LLC. All rights reserved.
Last updated: Mar 11 2001