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Newsgroups: comp.arch.fpga,comp.arch.embedded,sci.electronics.design
Subject: hard FPGA CPU cores do not moot soft cores
Date: Mon, 21 Aug 2000 08:31:39 -0700

Peter Alfke wrote
> As you may have read, Xilinx will put PowerPCs in the Virtex-II chips.
That
> might make part of this discussion moot.

I most respectfully disagree.  A fast hard CPU core will be a welcome
development, but it won't moot the utility of slower, more versatile,
programmable logic soft cores.

For example, a fast hard processor core could prove to be a nice management
interface coprocessor for a Virtex-II-based network router building block
chip made from an array of 32 or more routing-optimized (*) 100 MHz soft
processor cores.

For example, the 2M "gate" XCV2000E has 80x120x4 logic cells + 160 block
RAMs  At 600-800 logic cells + 2-4 block RAMs per CPU (educated guess), this
indicates a 32-processor chip-MP with 30% LUTs uncommitted.  Just think of
what you might do with a 10M "gate" Virtex-II.

Soft processor cores will play a huge role in future FPGA SoCs designs.

Jan Gray
Gray Research LLC
www.fpgacpu.org

(*) routing-optimized: multithreaded, integrated DMA, special instructions,
function units, tables, etc.  Even the lowly xr16 core has an integrated
15-channel DMA engine, at a cost of only 16 LUTs to the datapath.